A Differential Input/Output Linear MOS Transconductor

Pravit TONGPOON  Fujihiko MATSUMOTO  Takeshi OHBUCHI  Hitoshi TAKEUCHI  

IEICE TRANSACTIONS on Electronics   Vol.E94-C   No.6   pp.1032-1041
Publication Date: 2011/06/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1032
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
CMOS,  analog integrated circuits,  linear circuits,  differential input/output transconductors,  adaptively biasing circuits,  

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In this paper, a differential input/output linear MOS transconductor using an adaptively biasing technique is proposed. The proposed transconductor based on a differential pair is linearized by employing an adaptively biasing circuit. The linear characteristic of the individual differential output currents are obtained by introducing the adaptively biased currents to terminate the differential output terminals. Using the proposed technique, the common-mode rejection ration (CMRR) becomes high. Simulation results show that the proposed technique is effective for improvement of the linearity and other performances.