A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits

Yoji BANDO  Satoshi TAKAYA  Toru OHKAWA  Toshiharu TAKARAMOTO  Toshio YAMADA  Masaaki SOUDA  Shigetaka KUMASHIRO  Tohru MOGAMI  Makoto NAGATA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E94-C   No.4   pp.495-503
Publication Date: 2011/04/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.495
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
on-chip monitor,  power supply noise,  

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Summary: 
A continuous-time waveform monitoring technique for quality on-chip power noise measurements features matched probing performance among a variety of voltage domains of interest in a VLSI circuit, covering digital Vdd, analog Vdd, as well as at Vss, and multiple probing capability at various locations on power planes. A calibration flow eliminates the offset as well as gain errors among probing channels. The consistency of waveforms acquired by the proposed continuous-time monitoring and sampled-time precise digitization techniques is ensured. A 90-nm CMOS on-chip monitor prototype demonstrates dynamic power supply noise measurements with 200 mV at 2.5 V, 1.0 V, and 0.0 V, respectively, with less than 4 mV deviation among 240 probing channels.