An Area-Efficient, Low-VDD, Highly Reliable Multi-Cell Antifuse System Fully Operative in DRAMs

Jong-Pil SON  Jin Ho KIM  Woo Song AHN  Seung Uk HAN  Satoru YAMADA  Byung-Sick MOON  Churoo PARK  Hong-Sun HWANG  Seong-Jin JANG  Joo Sun CHOI  Young-Hyun JUN  Soo-Won KIM  

IEICE TRANSACTIONS on Electronics   Vol.E94-C   No.10   pp.1690-1697
Publication Date: 2011/10/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1690
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
DRAM,  antifuse,  repair,  post-package repair,  recovery,  

Full Text: PDF(1.8MB)>>
Buy this Article

A reliable antifuse scheme has been very hard to build, which has precluded its implementation in DRAM products. We devised a very reliable multi-cell structure to cope with the large process variation in the DRAM-cell-capacitor type antifuse system. The programming current did not rise above 564 µA even in the nine-cell case. The cumulative distribution of the successful rupture in the multi-cell structure could be curtailed dramatically to less than 15% of the single-cell's case and the recovery problem of programmed cells after the thermal stress (300) had disappeared. In addition, we also presented a Post-Package Repair (PPR) scheme that could be directly coupled to the external high-voltage power rail via an additional pin with small protection circuits, saving the chip area otherwise consumed by the internal pump circuitry. A 1 Gbit DDR SDRAM was fabricated using Samsung's advanced 50 nm DRAM technology, successfully proving the feasibility of the proposed antifuse system implemented in it.