Analysis of De-Embedding Error Cancellation in Cascade Circuit Design

Kyoya TAKANO  Ryuichi FUJIMOTO  Kosuke KATAYAMA  Mizuki MOTOYOSHI  Minoru FUJISHIMA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E94-C   No.10   pp.1641-1649
Publication Date: 2011/10/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1641
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technology)
Category: Measurement Techniques
Keyword: 
de-embedding,  TRL,  cascade circuit,  

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Summary: 
Accurate device models are very important for the design of high-frequency circuits. One of the factors degrading the accuracy of device models appears during the de-embedding procedure. Generally, to obtain device characteristics without parasitic elements such as pads, a de-embedding procedure is essential. However, some errors are introduced during this procedure, which degrades the accuracy of device models. In this paper, we demonstrate that such errors due to de-embedding are cancelled in cascade circuit design, meaning that cascade circuits can be designed without knowing the actual characteristics of devices. Because it is difficult to know the actual characteristics of devices at a high frequency, the cancellation of the de-embedding error is expected to improve the accuracy of device models at high frequencies. After giving a theoretical treatment of de-embedding error cancellation, we report the results of simulations and measurements performed for verification.