Structured LDPC Codes to Reduce Pseudo Cycles for Turbo Equalization in Perpendicular Magnetic Recording

Pornchai SUPNITHI  Watid PHAKPHISUT  Wicharn SINGHAUDOM  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E94-A   No.6   pp.1441-1448
Publication Date: 2011/06/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E94.A.1441
Print ISSN: 0916-8508
Type of Manuscript: PAPER
Category: Coding Theory
Keyword: 
iterative processing,  pseudo cycles,  LDPC code,  subblock encoder,  

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Summary: 
Low-density parity-check (LDPC) codes are typically designed to avoid the length-4 cycles to ensure acceptable levels of performance. However, the turbo equalization, which relies on an interaction between an inner code such as an LDPC code and a soft-output Viterbi algorithm (SOVA) detector, exhibits a performance degradation due to the pseudo cycles. In this paper, we propose an interleaved modified array code (IMAC) that can reduce the number of pseudo cycles, hence, improving the gains from the iterative processing technique. The modification is made on the existing array-based LDPC codes named modified array codes (MAC) by introducing an additional interleaving matrix to the parity-check matrix. Simulation results on the perpendicular magnetic recording channels (PMRC) demonstrate that the IMAC outperforms both the MAC and the previously proposed random interleave array (RIA) codes for the partial-response targets under consideration. In addition, a subblock-based encoder design is proposed to reduce the encoding complexity of the IMAC and when compared with the RIA code, the IMAC exhibits a lower encoding complexity, and still maintains a comparable level of the decoding complexity.