An Integrated CMOS Front-End Receiver with a Frequency Tripler for V-Band Applications

Po-Hung CHEN  Min-Chiao CHEN  Chun-Lin KO  Chung-Yu WU  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E93-C   No.6   pp.877-883
Publication Date: 2010/06/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E93.C.877
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Microwaves, Millimeter-Waves
Keyword: 
V-band,  transceivers,  CMOS subharmonic frequency tripler,  monolithic microwave integrated circuit (MMIC),  

Full Text: PDF>>
Buy this Article




Summary: 
A direct-conversion receiver integrated with the CMOS subharmonic frequency tripler (SFT) for V-band applications is designed, fabricated and measured using 0.13-µm CMOS technology. The receiver consists of a low-noise amplifier, a down-conversion mixer, an output buffer, and an SFT. A fully differential SFT is introduced to relax the requirements on the design of the frequency synthesizer. Thus, the operational frequency of the frequency synthesizer in the proposed receiver is only 20 GHz. The fabricated receiver has a maximum conversion gain of 19.4 dB, a minimum single-side band noise figure of 10.2 dB, the input-referred 1-dB compression point of -20 dBm and the input third order inter-modulation intercept point of -8.3 dB. It draws only 15.8 mA from a 1.2-V power supply with a total chip area of 0.794 mm0.794 mm. As a result, it is feasible to apply the proposed receiver in low-power wireless transceiver in the V-band applications.