Demonstration of 60-GHz Link Using a 1.6-Gb/s Mixed-Mode BPSK Demodulator

Kwang-Chun CHOI
Minsu KO
Duho KIM
Woo-Young CHOI

IEICE TRANSACTIONS on Electronics   Vol.E93-C    No.12    pp.1704-1707
Publication Date: 2010/12/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E93.C.1704
Print ISSN: 0916-8516
Type of Manuscript: BRIEF PAPER
Category: Electronic Circuits
binary phase shift keying,  BPSK,  modem,  demodulator,  IEEE802.15.3c,  wireless PAN,  

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A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-µm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380500 µm2. The fabricated chip is verified by 60-GHz wireless link tests with 1.6-Gb/s data.