Analyzing the On-State Power Dissipation in Stepped-Output Diode-Clamped Multi-Level Inverter

Ehsan ESFANDIARI  Norman Bin MARIUN  Mohammad Hamiruce MARHABAN  Azmi ZAKARIA  

IEICE TRANSACTIONS on Electronics   Vol.E93-C    No.12    pp.1670-1678
Publication Date: 2010/12/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E93.C.1670
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
diode-clamped,  multi-level inverter,  on-state,  MOSFET,  power dissipation,  

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In renewable power generators, because of high initial cost and duty cycle of systems, efficiency parameter has an important place. For this reason, line frequency controlled multilevel inverters are one of most proper choices for renewable power converters. Among these, diode-clamped multilevel inverter structures are one of most important and best efficient inverters. In this paper, a simple diode-clamped equivalent circuit for exploring the efficiency under resistive loads is proposed, and based on this simple circuit, the on-state power dissipation in improved and original diode-clamped multilevel inverter under resistive loads is analyzed. Then, comparative efficiency equations are extracted for inverters that use metal oxide semiconductor field-effect transistors (MOSFETs) and other p-n junction as switches. These equations enable us to have a better idea of conducting power dissipation in diode-clamped and help us to choose appropriate switches for having a lower on-state power dissipation. Some cases are studied and in the end it is proven that the calculated efficiency under resistive load is a boundary for inductive load with the same impedance in diode-clamped inverter with p-n junction switches. This means that calculating the efficiency under resistive loads enables us to approximately predict efficiency under inductive loads.