LDO Design Methodology and an Intelligent Power Management Sub-System IC for CDMA Handsets

Tsutomu WAKIMOTO  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E93-C    No.10    pp.1518-1524
Publication Date: 2010/10/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E93.C.1518
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
low dropout voltage regulator,  LDO,  power management,  feedforward compensation,  

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Summary: 
This paper describes the design methodology of a low dropout regulator (LDO). It was used to develop a power management sub-system IC for CDMA handsets which is also described in this paper. This IC contains 11 LDOs, bandgap reference, battery charger, control logic and some other peripheral circuits. For CDMA applications, very small ground current in the order of µA in standby mode is required for LDOs. An LDO architecture to meet this requirement and achieve stable operation over the process variation was developed. The on-chip logic efficiently controls all LDOs and battery charger to reduce the power dissipation as much as possible. This mixed signal subsystem has been implemented in the in-house 0.6-µm BCDMOS process. The very low LDO ground current down to 3 µA has been achieved with stable operation.