A High Throughput Medium Access Control Implementation Based on IEEE 802.11e Standard

Min Li HUANG  Jin LEE  Hendra SETIAWAN  Hiroshi OCHI  Sin-Chong PARK  

Publication
IEICE TRANSACTIONS on Communications   Vol.E93-B   No.4   pp.948-960
Publication Date: 2010/04/01
Online ISSN: 1745-1345
DOI: 10.1587/transcom.E93.B.948
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Terrestrial Radio Communications
Keyword: 
IEEE 802.11e,  MAC,  EDCA,  FPGA,  

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Summary: 
With the growing demand for high-performance multimedia applications over wireless channels, we need to develop a Medium Access Control (MAC) system that supports high throughput and quality of service enhancements. This paper presents the standard analysis, design architecture and design issues leading to the implementation of an IEEE 802.11e based MAC system that supports MAC throughput of over 100 Mbps. In order to meet the MAC layer timing constraints, a hardware/software co-design approach is adopted. The proposed MAC architecture is implemented on the Xilinx Virtex-II Pro Field-Programmable Gate Array (FPGA) (XC2VP70-5FF1704C) prototype, and connected to a host computer through an external Universal Serial Bus (USB) interface. The total FPGA resource utilization is 11,508 out of 33,088 (34%) available slices. The measured MAC throughput is 100.7 Mbps and 109.2 Mbps for voice and video access categories, transmitted at a data rate of 260 Mbps based on IEEE 802.11n Physical Layer (PHY), using the contention-based hybrid coordination function channel access mechanism.