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A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection
HyunJin KIM Hong-Sik KIM Jung-Hee LEE Jin-Ho AHN Sungho KANG
IEICE TRANSACTIONS on Communications
Publication Date: 2010/02/01
Online ISSN: 1745-1345
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Network Management/Operation
computer network security, deep packet inspection, finite state machine, pattern matching, and network monitoring,
Full Text: PDF(269KB)>>
This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore, total memory requirements can be minimized.