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CSD-Based Programmable Multiplier Design for Predetermined Coefficient Groups
Yong-Eun KIM Kyung-Ju CHO Jin-Gyun CHUNG Xinming HUANG
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/01/01
Online ISSN: 1745-1337
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
programmable CSD multiplier, partial products depth reduction, partial products sharing,
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An efficient multiplier design method for predetermined coefficient groups is presented based on the variation of canonic signed digit (CSD) encoding and partial product sharing. By applications to radix-24 FFT structure and the pulse-shaping filter design used in CDMA, it is shown that the proposed method significantly reduces the area, propagation delay and power consumption compared with previous methods.