Application-Dependent Interconnect Testing of Xilinx FPGAs Based on Line Branches Partitioning

Teng LIN  Jianhua FENG  Dunshan YU  

IEICE TRANSACTIONS on Information and Systems   Vol.E92-D   No.5   pp.1197-1199
Publication Date: 2009/05/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.E92.D.1197
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: Dependable Computing
FPGA,  application-dependent testing,  line branch,  Test Configuration,  

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A novel application-dependent interconnect testing scheme of Xilinx Field Programmable Gate Arrays (FPGAs) based on line branches partitioning is presented. The targeted line branches of the interconnects in FPGAs' Application Configurations (ACs) are partitioned into multiple subsets, so that they can be tested with compatible Configurable Logic Blocks (CLBs) configurations in multiple Test Configurations (TCs). Experimental results show that for ISCAS89 and ITC99 benchmarks, this scheme can obtain a stuck-at fault coverage higher than 99% in less than 11 TCs.