Accelerating Relaxation Using Dynamic Error Prediction

Hong Bo CHE  Jin Wook KIM  Tae Il BAE  Young Hwan KIM  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E92-A   No.2   pp.648-651
Publication Date: 2009/02/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E92.A.648
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
circuit simulation,  relaxation method,  acceleration scheme,  dynamic error prediction,  

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A new acceleration scheme that decreases the number of required iterations in relaxation methodology is proposed. The proposed scheme uses dynamic error prediction of an improved approximation to the solution during an iterative computation. The proposed scheme's application to circuit simulations required an average of 67.3% fewer iterations compared to un-accelerated relaxation methods.