IEICE Trans - Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits

Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits

Taichi OGAWA
Tetsuya HIROSE
Tetsuya ASAI
Yoshihito AMEMIYA

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E92-A No.2 pp.436-442
Publication Date: 2009/02/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E92.A.436
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category:
Keyword:
subthreshold, MOS, circuit, threshold logic, majority logic, gate, current mode,

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Summary:
A threshold-logic gate device consisting of subthreshold MOSFET circuits is proposed. The gate device performs threshold-logic operation, using the technique of current-mode addition and subtraction. Sample digital subsystems, i.e., adders and morphological operation cells based on threshold logic, are designed using the gate devices, and their operations are confirmed by computer simulation. The device has a simple structure and operates at low power dissipation, so it is suitable for constructing cell-based, parallel processing LSIs such as cellular-automaton and neural-network LSIs.