Accurate Method for Calculating the Effective Capacitance with RC Loads Based on the Thevenin Model

Minglu JIANG  Zhangcai HUANG  Atsushi KUROKAWA  Shuai FANG  Yasuaki INOUE  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E92-A   No.10   pp.2531-2539
Publication Date: 2009/10/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E92.A.2531
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
Category: Nonlinear Problems
static timing analysis,  gate delay,  effective capacitance,  Thevenin model,  

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In deep submicron designs, predicting gate delays with interconnect load is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept and the Thevenin model that replaces the gate with a linear resistor and a voltage source are usually used to calculate the delay of gate with interconnect load. In conventional methods, it is not considered that the charges transferred into interconnect load and Ceff in the Thevenin model are not equal. The charge difference between interconnect load and Ceff has the large influence to the accuracy of computing Ceff. In this paper, an advanced effective capacitance model is proposed to consider the above problem in the Thevenin model, where the influence of the charge difference is modeled as one part of the effective capacitance to compute the gate delay. Experimental results show a significant improvement in accuracy when the charge difference between interconnect load and Ceff is considered.