Design of a 0.5 V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources

Jun WANG  Tuck-Yang LEE  Dong-Gyou KIM  Toshimasa MATSUOKA  Kenji TANIGUCHI  

IEICE TRANSACTIONS on Electronics   Vol.E91-C   No.8   pp.1375-1378
Publication Date: 2008/08/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e91-c.8.1375
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Electronic Circuits
operational amplifier,  CMOS inverter,  floating voltage source,  forward body bias,  

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This letter presents a 0.5 V low-voltage op-amp in a standard 0.18 µm CMOS process for switched-capacitor circuits. Unlike other two-stage 0.5 V op-amp architectures, this op-amp consists of CMOS inverters that utilize floating voltage sources and forward body bias for obtaining high-speed operation. And two improved common-mode rejection circuits are well combined to achieve low power and chip area reduction. Simulation results indicate that the op-amp has an open-loop gain of 62 dB, and a high unity gain bandwidth of 56 MHz. The power consumption is only 350 µW.