Design of Low Power Track and Hold Circuit Based on Two Stage Structure

Takahide SATO  Isamu MATSUMOTO  Shigetaka TAKAGI  Nobuo FUJII  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E91-C   No.6   pp.894-902
Publication Date: 2008/06/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e91-c.6.894
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
track and hold circuit,  low power consumption,  flash analog to digital converter,  two-stage structure,  

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Summary: 
This paper proposes a low power and high speed track and hold circuit (T/H circuit) based on the two-stage structure. The proposed circuit consists of two internal T/H circuits connected in cascade. The first T/H circuit converts an input signal into a step voltage and it is applied to the following second T/H circuit which drives large load capacitors and consumes large power. Applying the step voltage to the second T/H circuit prevents the second T/H circuit from charging and discharging its load capacitor during an identical track phase and enables low power operation. Thanks to the two-stage structure the proposed T/H circuit can save 29% of the power consumption compared with the conventional one. An optimum design procedure of the proposed two stage T/H circuit is explained and its validity is confirmed by HSPICE simulations.