Bit-Serial Single Flux Quantum Microprocessor CORE

Akira FUJIMAKI  Masamitsu TANAKA  Takahiro YAMADA  Yuki YAMANASHI  Heejoung PARK  Nobuyuki YOSHIKAWA  

IEICE TRANSACTIONS on Electronics   Vol.E91-C   No.3   pp.342-349
Publication Date: 2008/03/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e91-c.3.342
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Section on Recent Progress in Superconductive Digital Electronics)
superconductor,  microprocessor,  single flux quantum,  bit-serial,  LSI,  

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We describe the development of single-flux-quantum (SFQ) microprocessors and the related technologies such as designing, circuit architecture, microarchitecture, etc. Since the microprocessors studied here aim for a general-purpose computing system, we employ the complexity-reduced (CORE) architecture in which the high-speed nature of the SFQ circuits is used not for increasing processor performance but for reducing the circuit complexity. The bit-serial processing is the most suitable way to realize the CORE architecture. We assembled all the best technologies concerning SFQ integrated circuits and designed the SFQ microprocessors, CORE1α, CORE1β, and CORE1γ. The CORE1β was made up of about 11000 Josephson junctions and successfully demonstrated. The peak performance reached 1400 million operations per second with a power consumption of 3.4 mW. We showed that the SFQ microprocessors had an advantage in a performance density to semiconductor's ones, which lead to the potential for constructing a high performance SFQ-circuit-based computing system.