Improvements in Fabrication Process for Nb-Based Single Flux Quantum Circuits in Japan

Mutsuo HIDAKA  Shuichi NAGASAWA  Kenji HINODE  Tetsuro SATOH  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E91-C   No.3   pp.318-324
Publication Date: 2008/03/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e91-c.3.318
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Section on Recent Progress in Superconductive Digital Electronics)
Category: 
Keyword: 
superconductive circuit,  Josephson junction,  fabrication process,  SFQ (Single Flux Quantum) circuit,  Nb/AlOx/Nb junction,  

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Summary: 
We developed an Nb-based fabrication process for single flux quantum (SFQ) circuits in a Japanese government project that began in September 2002 and ended in March 2007. Our conventional process, called the Standard Process (SDP), was improved by overhauling all the process steps and routine process checks for all wafers. Wafer yield with the improved SDP dramatically increased from 50% to over 90%. We also developed a new fabrication process for SFQ circuits, called the Advanced Process (ADP). The specifications for ADP are nine planarized Nb layers, a minimum Josephson junction (JJ) size of 11 µm, a line width of 0.8 µm, a JJ critical current density of 10 kA/cm2, a 2.4 Ω Mo sheet resistance, and vertically stacked superconductive contact holes. We fabricated an eight-bit SFQ shift register, a one million SQUID array and a 16-kbit RAM by using the ADP. The shift register was operated up to 120 GHz and no short or open circuits were detected in the one million SQUID array. We confirmed correct memory operations by the 16-kbit RAM and a 5.7 times greater integration level compared to that possible with the SDP.