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Low-Power Switched Current Memory Cell with CMOS-Type Configuration Masashi KATO Nobuyuki TERADA Hirofumi OHATA Eisuke ARAI Publication IEICE TRANSACTIONS on Electronics Vol.E91-C No.1 pp.120-121 Publication Date: 2008/01/01 Online ISSN: 1745-1353 DOI: 10.1093/ietele/e91-c.1.120 Print ISSN: 0916-8516 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: switched current, low-power, CMOS-type, memory cell, Full Text: PDF>>
Summary: This letter presents a low-power switched current (SI) memory cell with CMOS-type configuration. By combining nMOS and pMOS in the SI memory cell and using a polarity discrimination circuit, we design a CMOS-type SI memory cell which eliminates the quiescent current in the SI memory cell. The simulation result shows that the CMOS-type SI memory cell consumes less power than the conventional class-AB memory cell. | |||||
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