Logic and Layout Aware Level Converter Optimization for Multiple Supply Voltage

Liangpeng GUO  Yici CAI  Qiang ZHOU  Xianlong HONG  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E91-A   No.8   pp.2084-2090
Publication Date: 2008/08/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e91-a.8.2084
Print ISSN: 0916-8508
Type of Manuscript: PAPER
Category: VLSI Design Technology and CAD
Keyword: 
voltage island,  level converter,  low power,  placement,  

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Summary: 
Multiple supply voltage (MSV) is an effective scheme to achieve low power. Recent works in MSV are based on physical level and aim at reducing physical overheads, but all of them do not consider level converter, which is one of the most important issues in dual-vdd design. In this work, a logic and layout aware methodology and related algorithms combining voltage assignment and placement are proposed to minimize the number of level converters and to implement voltage islands with minimal physical overheads. Experimental results show that our approach uses much fewer level converters (reduced by 83.23% on average) and improves the power savings by 16% on average compared to the previous approach [1]. Furthermore, the methodology is able to produce feasible placement with a small impact to traditional placement goals.