Injection-Locked Clock Recovery Using a Multiplexed Oscillator for Half-Rate Data-Recovered Applications

Ching-Yuan YANG

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E91-A    No.1    pp.409-412
Publication Date: 2008/01/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e91-a.1.409
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
clock recovery,  data recovery,  injection-locked oscillation,  

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An injection-locked clock recovery circuit (CRC) with quadrature outputs based on multiplexed oscillator is presented. The CRC can operate at a half-rate speed to provide an adequate locking range with reasonable jitter and power consumption because both clock edges sample the data waveforms. Implemented by 0.18-µm CMOS technique, experimental results demonstrate that it can achieve the phase noise of the recovered clock about -121.55 dBc/Hz at 100-kHz offset and -129.58 dBc/Hz at 1-MMz offset with 25 MHz lock range, while operating at the input data rate of 1.55 Gb/s.