Analysis of Test Generation Complexity for Stuck-At and Path Delay Faults Based on τk-Notation

Chia Yee OOI  Thomas CLOUQUEUR  Hideo FUJIWARA  

IEICE TRANSACTIONS on Information and Systems   Vol.E90-D   No.8   pp.1202-1212
Publication Date: 2007/08/01
Online ISSN: 1745-1361
DOI: 10.1093/ietisy/e90-d.8.1202
Print ISSN: 0916-8532
Type of Manuscript: PAPER
Category: Complexity Theory
easily testable,  stuck-at faults,  path delay faults,  test generation complexity,  

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In this paper, we discuss the relationship between the test generation complexity for path delay faults (PDFs) and that for stuck-at faults (SAFs) in combinational and sequential circuits using the recently introduced τk-notation. On the other hand, we also introduce a class of cyclic sequential circuits that are easily testable, namely two-column distributive state-shiftable finite state machine realizations (2CD-SSFSM). Then, we discuss the relevant conjectures and unsolved problems related to the test generation for sequential circuits with PDFs under different clock schemes and test generation models.