Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA

Takashi KAWANAMI  Masakazu HIOKI  Yohei MATSUMOTO  Toshiyuki TSUTSUMI  Tadashi NAKAGAWA  Toshihiro SEKIGAWA  Hanpei KOIKE  

IEICE TRANSACTIONS on Information and Systems   Vol.E90-D   No.12   pp.1947-1955
Publication Date: 2007/12/01
Online ISSN: 1745-1361
DOI: 10.1093/ietisy/e90-d.12.1947
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Reconfigurable Device and Design Tools
FPGA,  low-power,  threshold voltage control,  body bias,  

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This paper describes a new design concept, the Body Bias Voltage Set (BBVS), and presents the effect of the BBVS on static power, operating speed, and area overhead in an FPGA with field-programmable Vth components. A Flex Power FPGA is an FPGA architecture to solve the static power problem by the fine grain field-programmable Vth control method. Since the Vth of transistors for specific circuit blocks in the Flex Power FPGA is chosen from a set of Vth values defined by a BBVS, selection of a particular BBVS is an important design decision. A particular BBVS is chosen by selecting body biases from among several supplied body bias candidates. To select the optimal BBVS, we provide 136 BBVSs and perform a thorough search. In a BBVS of less Vth steps, the deepest reverse body bias for high-Vth transistors does not necessarily result in optimal conditions. A BBVS of 0.0 V and -0.8 V, which requires 1.65 times the original area, utilizes as little as 1/30 of the static power of a conventional FPGA without performance degradation. Use of an aggressive forward body bias voltage such as +0.6 V for lowest-Vth, performance is increased by up to 10%. Another BBVS of +0.6 V, 0.0 V, and -0.8 V reduces static power to 14.06% while maintaining a 10% performance increase, but it requires 2.75-fold area.