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Optimal Termination of On-Chip Transmission-Lines for High-Speed Signaling
Akira TSUCHIYA Masanori HASHIMOTO Hidetoshi ONODERA
IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
on-chip transmission-line, termination,
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This paper discusses the resistive termination of on-chip high-performance interconnects. Resistive termination is effective to improve the bandwidth of on-chip interconnects, on the other hands, increases the power dissipation and the area. Therefore trade-off analysis about resistive termination is necessary. This paper proposes a method to determine the termination of on-chip interconnects. The termination derived by the proposed method provides minimum sensitivity to process variation as well as maximum eye-opening in voltage.