A Multiple Block-matching Step (MBS) Algorithm for H.26x/MPEG4 Motion Estimation and a Low-Power CMOS Absolute Differential Accumulator Circuit

Tadayoshi ENOMOTO  Nobuaki KOBAYASHI  Tomomi EI  

IEICE TRANSACTIONS on Electronics   Vol.E90-C   No.4   pp.718-726
Publication Date: 2007/04/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e90-c.4.718
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
power dissipation,  motion estimation,  breaking-off search,  CMOS,  full search,  

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To drastically reduce the power dissipation (P) of an absolute difference accumulation (ADA) circuit for H.26x/MPEG4 motion estimation, a fast block-matching (BM) algorithm called the Multiple Block-matching Step (MBS) algorithm has been developed. The MBS algorithm can drastically improve the block matching speed, while achieving the same visual quality as that of a full search (FS) BM algorithm. Power dissipation (P) of a 0.18-µm CMOS absolute difference accumulator (ADA) circuit employing the MBS algorithm is significantly reduced to the range of about 0.3% to 12% that of the same ADA circuit adopting FS.