Design of High-Rate Serially Concatenated Codes with Low Error Floor

Motohiko ISAKA  Philippa A. MARTIN  Marc P.C. FOSSORIER  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E90-A   No.9   pp.1754-1762
Publication Date: 2007/09/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e90-a.9.1754
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: 
Keyword: 
serially concatenated codes,  interleaver,  error floor,  list decoding,  

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Summary: 
In this paper we look at the serial concatenation of short linear block codes with a rate-1 recursive convolutional encoder, with a goal of designing high-rate codes with low error floor. We observe that under turbo-style decoding the error floor of the concatenated codes with extended Hamming codes is due to detectable errors in many cases. An interleaver design addressing this is proposed in this paper and its effectiveness is verified numerically. We next examine the use of extended BCH codes of larger minimum distance, resulting in an improved weight spectrum of the overall code. Reduced complexity list decoding is used to decode the BCH codes in order to obtain low decoding complexity for a negligible loss in performance.