A Tableau Construction Approach to Control Synthesis of FSMs Using Simulation Relations

Yoshisato SAKAI

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E90-A    No.4    pp.836-846
Publication Date: 2007/04/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e90-a.4.836
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
temporal logic,  tableau,  control synthesis,  simulation relation,  

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We propose a new tableau construction which builds an FSM, instead of a Kripke structure, from a formula in a class of temporal logic named ASTL. This FSM is a maximal model of the formula under the preorder derived from simulation relations. Additionally, we propose a method using the tableaus to build controllers in a certain topology of interconnected FSMs. We can use ASTL to describe the desired behaviors of the control system. This method is applicable to generating digital circuits. Moreover, this method accepts a wider range of specifications than conventional methods.