A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture

Shin'ichi KOUYAMA  Tomonori IZUMI  Hiroyuki OCHI  Yukihiro NAKAMURA  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E90-A   No.4   pp.784-791
Publication Date: 2007/04/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e90-a.4.784
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
self-reconfiguration,  evaluation of architecture,  model of architecture,  simulation,  

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Recently, self-reconfigurable devices which can be partially reprogrammed by other part of the same device have been proposed. However, since conventional self-reconfigurable devices are LUT-array-based fine-grained devices, their time efficiency is spoiled by overhead for reconfiguration time to load large amount of configuration data. Therefore, we have to improve architectures. At the architecture design phase, it is difficult to estimate the performance, including reconfiguration overhead, of self-reconfigurable devices by static analysis, since it depends on many architecture parameters and unpredictable run-time behavior. In this paper, we propose a simulation-based platform for design exploration of self-reconfigurable devices. As a demonstration of the proposed platform, we implement an adaptive load distribution model on the devices of various reconfiguration granularities and evaluate performance of the devices.