Jitter Tolerant Continuous-Time Sigma-Delta A-D Converter Employing In-Loop Low-Pass Filter

Daisuke KOBAYASHI  Shigetaka TAKAGI  Nobuo FUJII  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E90-A   No.2   pp.351-357
Publication Date: 2007/02/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e90-a.2.351
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
continuous-time sigma-delta modulator,  A-D converter,  oversampling data converter,  jitter tolerance,  

Full Text: PDF>>
Buy this Article




Summary: 
This paper proposes a jitter tolerant continuous-time sigma-delta A-D converter structure as well as its design method. This method transforms a conventionally designed sigma-delta A-D converter into a jitter tolerant one. Jitter tolerance is provided by the modified feedback signal paths and a consequently inserted digital LPF. This method is applicable independently of a system order and the other specifications.