For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
A Low-Cost Recovery Mechanism for Processors with Large Instruction Windows
In Pyo HONG
Byung In MOON
Yong Surk LEE
IEICE TRANSACTIONS on Information and Systems
Publication Date: 2006/06/01
Online ISSN: 1745-1361
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: VLSI Systems
register renaming, recovery, checkpointing,
Full Text: PDF>>
The latest processors employ a large instruction window and longer pipelines to achieve higher performance. Although current branch predictors show high accuracy, the misprediction penalty is getting larger in proportion to the number of pipeline stages and pipeline width. This negative effect also happens in case of exceptions or interrupts. Therefore, it is important to recover processor state quickly and restart processing immediately. In this letter, we propose a low-cost recovery mechanism for processors with large instruction windows.