Future of Heterostructure Microelectronics and Roles of Materials Research for Its Progress

Hideki HASEGAWA  Seiya KASAI  Taketomo SATO  Tamotsu HASHIZUME  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E89-C   No.7   pp.874-882
Publication Date: 2006/07/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e89-c.7.874
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Section on Heterostructure Microelectronics with TWHM2005)
Category: 
Keyword: 
heterostructure,  III-V semiconductors,  nanotechnology,  high speed devices,  sensors,  smart chips,  

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Summary: 
With advent of the ubiquitous network era and due to recent progress of III-V nanotechnology, the present III-V heterostructure microelectronics will turn into what one might call III-V heterostructure nanoelectronics, and may open up a new future in much wider application areas than today, combining information technology, nanotechnology and biotechnology. Instead of the traditional top-down approach, new III-V heterostructure nanoelectronics will be formed on nanostructure networks formed by combination of top-down and bottom-up approaches. In addition to communication devices, emerging devices include high speed digital LSIs, various sensors, various smart-chips, quantum LSIs and quantum computation devices covering varieties of application areas. Ultra-low power quantum LSIs may become brains of smart chips and other nano-space systems. Achievements of new functions and higher performances and their on chip integration are key issues. Key processing issue remains to be understanding and control of nanostructure surfaces and interfaces in atomic scale.