For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
A Spread-Spectrum Clock Generator Using Fractional-N PLL with an Extended Range ΣΔ Modulator
Yi-Bin HSIEH Yao-Huang KAO
IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
spread spectrum, ΣΔ modulator, phase-locked loop, fractional-N,
Full Text: PDF>>
A spread-spectrum clock generator (SSCG) using fractional-N phase-locked loop (PLL) with an extended range sigma-delta (ΣΔ) modulator is presented in this paper. The proposed ΣΔ modulator simply adds an extra output bit in the first stage modulator. It can enlarge the input range about three times as compared to the conventional modulator and solve the saturation problem when the input exceeds the boundary of the conventional modulator. A flexible digital modulation controller can generate center and down spread-spectrum modulation and each has spread ratios of 0.4%, 0.8%, 1.6% and 3.2%. The proposed SSCG has been fabricated in TSMC 0.35-µm double-poly quadruple-metal CMOS process with output frequency of 300 MHz. The active area is 0.630.62 mm2 and the power consumption is 17.5 mW.