A Study to Realize a CMOS Pipelined Current-Mode A-to-D Converter for Video Applications

Yasuhiro SUGIMOTO  Yuji GOHDA  Shigeto TANAKA  

IEICE TRANSACTIONS on Electronics   Vol.E89-C    No.6    pp.811-813
Publication Date: 2006/06/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e89-c.6.811
Print ISSN: 0916-8516
Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
current-mode circuit,  pipelined ADC,  low-voltage,  high-resolution,  

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The possibility of realizing a CMOS pipelined current-mode A-D converter (ADC) for video applications has been examined. Two times the input current is obtained at the output of a bit-block of a pipelined ADC by subtracting the negative output current from the positive output current in the pseudo-differential configuration. Subtraction of the sub-DAC (D-to-A converter) current from the two times the input current is performed by controlling of the current comparator, which compares the positive and the negative input currents. A prototype chip has been implemented using 0.35 µm CMOS devices. It operates in 28 MS/s, and showed a 42 dB signal-to-noise ratio from the 2 V supply voltage.