A -90 dBc@10 kHz Phase Noise Fractional-N Frequency Synthesizer with Accurate Loop Bandwidth Control Circuit

Shiro DOSHO  Takashi MORIE  Koji OKAMOTO  Yuuji YAMADA  Kazuaki SOGAWA  

IEICE TRANSACTIONS on Electronics   Vol.E89-C   No.6   pp.739-745
Publication Date: 2006/06/01
Online ISSN: 1745-1353
DOI: 10.1093/ietele/e89-c.6.739
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
synthesizer,  fractional-N,  bandwidth-control,  0.13 µm-CMOS,  

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This paper describes a -90 dBc@10 kHz phase noise fractional-N frequency synthesizer of 110 M-180 MHz output with accurate loop bandwidth control. Stable phase noise characteristics are achieved by controlling the bandwidth correctly, even if the PLL uses a noisy but small ring oscillator. Digital controller adjusts voltage controlled oscillator (VCO) gain and time constant of the loop filter. Analog controller compensates temperature variance. Test chip fabricated on 0.13 µm CMOS process shows stable and 6.8 dB improvement of the phase noise performance is achieved against process and environmental variations.