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Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI
Yukihito OOWAKI Shinichiro SHIRATAKE Toshihide FUJIYOSHI Mototsugu HAMADA Fumitoshi HATORI Masami MURAKATA Masafumi TAKAHASHI
IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
dynamic voltage/frequency scaling, system LSI, H.264, MPEG-4, A/V codec LSI, multimedia chip,
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The module-wise dynamic voltage and frequency scaling (MDVFS) scheme is applied to a single-chip H.264/MPEG-4 audio/visual codec LSI. The power consumption of the target module with controlled supply voltage and frequency is reduced by 40% in comparison with the operation without voltage or frequency scaling. The consumed power of the chip is 63 mW in decoding QVGA H.264 video at 15 fps and MPEG-4 AAC LC audio simultaneously. This LSI keep operating continuously even during the voltage transition of the target module by introducing the newly developed dynamic de-skewing system (DDS) which watches and control the clock edge of the target module.