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Coding Floorplans with Fewer Bits
Katsuhisa YAMANAKA Shin-ichi NAKANO
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/05/01
Online ISSN: 1745-1337
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Full Text: PDF(181.7KB)>>
A naive coding of floorplans needs 2m bits for each floorplan. In this paper we give a new simple coding of floorplans, which needs only 5m/3 bits for each floorplan.