A Structural Approach for Transistor Circuit Synthesis

Hiroaki YOSHIDA  Makoto IKEDA  Kunihiro ASADA  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E89-A   No.12   pp.3529-3537
Publication Date: 2006/12/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e89-a.12.3529
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Synthesis
transistor-level synthesis,  static CMOS circuits,  algebraic transformations,  structural transformations,  dynamic programming,  

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This paper presents a structural approach for synthesizing arbitrary multi-output multi-stage static CMOS circuits at the transistor level, targeting the reduction of transistor counts. To make the problem tractable, the solution space is restricted to the circuit structures which can be obtained by performing algebraic transformations on an arbitrary prime-and-irredundant two-level circuit. The proposed algorithm is guaranteed to find the optimal solution within the solution space. The circuit structures are implicitly enumerated via structural transformations on a single graph structure, then a dynamic-programming based algorithm efficiently finds the minimum solution among them. Experimental results on a benchmark suite targeting standard cell implementations demonstrate the feasibility and effectiveness of the proposed approach. We also demonstrated the efficiency of the proposed algorithm by a numerical analysis on randomly-generated problems.