For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Design of a Mutated Adder and Its Optimization Using ILP Formulation
Jeong-Gun LEE Jeong-A LEE Suk-Jin KIM Kiseon KIM
IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Print ISSN: 0916-8532
Type of Manuscript: Special Section LETTER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Digital Circuits and Computer Arithmetic
mutated adder, mixture of carry propagation schemes, ILP-based optimization,
Full Text: PDF>>
A mutated adder architecture utilizing a mixture of carry propagation schemes is proposed to design a delay-area efficient adder which were not available in an ordinary design space. Further, we develop an optimization method based on integer linear programming to search the expanded design space of the mutated adder.