Speculative Branch Folding for Pipelined Processors

Sang-Hyun PARK  Sungwook YU  Jung-Wan CHO  

IEICE TRANSACTIONS on Information and Systems   Vol.E88-D   No.5   pp.1064-1066
Publication Date: 2005/05/01
Online ISSN: 
DOI: 10.1093/ietisy/e88-d.5.1064
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: Computer Systems
branch folding,  speculative,  embedded processor,  pipeline,  

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This paper proposes an effective branch folding technique which combines branch instructions with predicted instructions. This technique can be implemented using an instruction queue, which buffers prefetched instructions. Most of the instructions in the instruction queue are forwarded to the execution unit in sequence. Branch instructions, however, are combined with predicted instructions in the instruction queue and these folded instructions are forwarded to the execution unit. Miss-prediction can be recovered by flushing folded instructions without processor state recovery and by restarting from the other path. Simulation and implementation results show that both performance and power consumption are significantly improved with little additional hardware cost.