A High Speed Fuzzy Inference Processor with Dynamic Analysis and Scheduling Capabilities

Shih-Hsu HUANG  Jian-Yuan LAI  

IEICE TRANSACTIONS on Information and Systems   Vol.E88-D   No.10   pp.2410-2416
Publication Date: 2005/10/01
Online ISSN: 
DOI: 10.1093/ietisy/e88-d.10.2410
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: Computer Components
fuzzy logic,  fuzzy rule,  fuzzy inference,  digital design,  integrated circuit,  

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The most obvious architectural solution for high-speed fuzzy inference is to exploit temporal parallelism and spatial parallelism inherited in a fuzzy inference execution. However, in fact, the active rules in each fuzzy inference execution are often only a small part of the total rules. In this paper, we present a new architecture that uses less hardware resources by discarding non-active rules in the earlier pipeline stage. Compared with previous work, implementation data show that the proposed architecture achieves very good results in terms of the inference speed and the chip area.