For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Efficient Mismatch-Insensitive Track-and-Hold Circuit Using Low-Voltage Floating-Gate MOS Transistors
Apisak WORAPISHET Kornika MOOLPHO Jitkasame NGARMNIL
IEICE TRANSACTIONS on Electronics
Publication Date: 2005/06/01
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: Building Block
floating-gate analog circuits, track-and-hold circuits, low-voltage analog techniques,
Full Text: PDF>>
A structure of a track-and-hold (T/H) circuit based on a pair of complementary floating-gate (FG) MOS transistors is introduced. Its main features include low complexity, low operating supply voltage and gain insensitivity to device mismatches, leading to efficient realization of numerous baseband functions in modern communication systems. The detailed operation and performance analysis of the FG T/H circuit are given. Functional verification of the circuit is provided through a breadboard experiment. The effectiveness of the circuit is verified via simulations where the single T/H cell operating at 10 MHz clock frequency exhibits gain variation less than 0.13% and a dynamic range over 71 dB with the coupling capacitance of 300 fF at 1.5 V supply and 12.75 µW power consumption. As a demonstration on its practical viability, the designed FG T/H cell was also utilized to realize a 10 MS/s 7-tap analog correlator for possible use in modern communication applications.