For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier
Satoshi SHIGEMATSU Hiroki MORIMURA Katsuyuki MACHIDA Yukio OKAZAKI Hakaru KYURAGI
IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
pixel parallel, image processing, pattern matching, fingerprint, sensor,
Full Text: PDF>>
This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.