Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier

Satoshi SHIGEMATSU  Hiroki MORIMURA  Katsuyuki MACHIDA  Yukio OKAZAKI  Hakaru KYURAGI  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E88-C   No.5   pp.1070-1078
Publication Date: 2005/05/01
Online ISSN: 
DOI: 10.1093/ietele/e88-c.5.1070
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
pixel parallel,  image processing,  pattern matching,  fingerprint,  sensor,  

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Summary: 
This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.