Multi-Gigabit Pre-Emphasis Design and Analysis for Serial Link

Chih-Hsien LIN  Chang-Hsiao TSAI  Chih-Ning CHEN  Shyh-Jye JOU  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E88-C   No.10   pp.2009-2019
Publication Date: 2005/10/01
Online ISSN: 
DOI: 10.1093/ietele/e88-c.10.2009
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
pre-emphasis,  high-speed serial link,  coaxial cable,  transmitter,  

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Summary: 
In this paper, a multi-Gbps pre-emphasis design methodology and circuits for a 4/2 Pulse Amplitude Modulation (PAM) transmitter of high-speed data serial link over cable are proposed. Theoretically analysis of the total frequency response including pre-emphasis, package, cable loss and termination are first carried out. In order to gain higher data rates without increasing of symbol rate, we use 4 PAM in our system. Then, we propose a pre-emphasis architecture and algorithm that can enlarge the high frequency response so the overall frequency response in the receiver side is uniform within the desired frequency range. The overall circuit is implemented in TSMC 0.18 µm 1P6M 1.8 V CMOS process. A test chip of this transmitter with pre-emphasis, PLL circuit and on-chip termination resistors is implemented by full custom flow to verify the design methodology. The measurement results of 10/5 Gbps (4/2 PAM) are carried out over 5 meter (m) long cable and is in agreement with our analysis and simulation results.