Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs

Zhi Liang WANG  Osami WADA  Takashi HARADA  Takahiro YAGUCHI  Yoshitaka TOYOTA  Ryuji KOGA  

Publication
IEICE TRANSACTIONS on Communications   Vol.E88-B   No.8   pp.3176-3181
Publication Date: 2005/08/01
Online ISSN: 
DOI: 10.1093/ietcom/e88-b.8.3176
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section of 2004 International Symposium on Electromagnetic Compatibility)
Category: Printed Circuit Boards
Keyword: 
power bus stack and modeling,  cavity-mode model,  via interconnect,  EMI,  

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Summary: 
Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.