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Design and Performance Evaluation of IEEE 802.11a SDR Software Implemented on a Reconfigurable Processor
Kazunori AKABANE Hiroyuki SHIBA Munehiro MATSUI Kiyoshi KOBAYASHI Katsuhiko ARAKI
IEICE TRANSACTIONS on Communications
Publication Date: 2005/11/01
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Software Defined Radio Technology and Its Applications)
software defined radio, reconfigurable processor, wireless LAN, IEEE 802.11a,
Full Text: PDF(1.9MB)>>
Software defined radio (SDR) mobile terminals that can access multiple wireless communication systems are the trend of the future. An SDR wideband mobile terminal must be capable of high-speed data processing and low power consumption. We focused on reconfigurable processors with these features. To evaluate the performance of reconfigurable processors for SDR wideband mobile terminals, we developed and evaluated software that runs on a reconfigurable processor for the IEEE 802.11a wireless local area network (LAN) baseband part, which requires high-speed data processing. This paper describes the configuration of the SDR IEEE 802.11a software for the reconfigurable processor and its performance evaluation results. Moreover, we showed the requirements for applying the reconfigurable processor to SDR wideband mobile terminals, and confirmed that the reconfigurable processor could be applied to SDR mobile terminals by slight progresses.