Verifying Trace Equivalence of a Shared-Memory-Style Communication System

Yoshinobu KAWABE  Ken MANO  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E88-A   No.4   pp.915-922
Publication Date: 2005/04/01
Online ISSN: 
DOI: 10.1093/ietfec/e88-a.4.915
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)
I/O-automaton,  trace equivalence,  theorem proving,  

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This paper describes a formal verification for a shared-memory-style communication system. We first describe two versions (i.e. abstract and concrete) of the communication system based on an I/O-automaton, which is a formal system for distributed algorithms. Then, we prove the concrete version can perform all the external operations of the abstract version. This result, together with a former result, leads to the equivalence of the two versions. The proof is done by Larch theorem prover, and is the ever largest case study using I/O-automata.