A New Solution to Power Supply Voltage Drop Problems in Scan Testing

Takaki YOSHIDA  Masafumi WATARI  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E87-D   No.3   pp.580-585
Publication Date: 2004/03/01
Online ISSN: 
DOI: 
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI)
Category: Scan Testing
Keyword: 
power supply voltage drop,  noise,  low power,  scan test,  clock duty,  

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Summary: 
As semiconductor manufacturing technology advances, power dissipation and noise in scan testing have become critical problems. Our studies on practical LSI manufacturing show that power supply voltage drop causes testing problems during shift operations in scan testing. In this paper, we present a new testing method named MD-SCAN (Multi-Duty SCAN) which solves power supply voltage drop problems, as well as its experimental results applied to practical LSI chips.